Intel 810A3, Design Manual

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PGA370 Processor Design Guidelines
2-10 Intel
®
810A3 Chipset Design Guide
2.2.5 CLKREF Circuit Implementation
The CLKREF input requires a 1.25V source. It can be generated from a voltage divider on the
Vcc2.5 or Vcc3.3 sources utilizing 1% tolerance resistors. A 4.7 uF decoupling capacitor should
be included on this input. See
Figure 2-4 and Table 2-9 for example CLKREF circuits. Do not use
Vtt as the source for this reference!
2.2.6 Undershoot/Overshoot Requirements
The Intel
®
Pentium
®
III
processor has more restrictive overshoot and undershoot requirements for
system bus signals than previous processors. These requirements stipulate that a signal at the
output of the driver buffer and at the input of the receiver buffer must not exceed a maximum
absolute overshoot voltage limit (2.1V) and a minimum absolute undershoot voltage limit (-
0.35V). Exceeding these limits will cause damage to the Intel
®
Pentium
®
III
processor. There is
also a time dependent, non-linear overshoot and undershoot requirement that is dependent on the
amplitude and duration of the overshoot/undershoot. See the Intel
®
Pentium
®
III
processor
datasheet for more details on overshoot/undershoot specifications.
Figure 2-4. Examples for CLKREF Divider Circuit
Table 2-9. Example Resistor Values for CLKREF Divider Circuit (3.3V Source)
R1 (
Ω
) R2 (
Ω
) CLKREF Voltage (V)
182 110 1.243
301 182 1.243
374 221 1.226
499 301 1.242
Vcc2.5
PGA370
C L K R E F
150
Ω
Y 3 3
150
Ω 4 . 7 u F
Vcc3.3
PGA370
C L K R E F
R 1
Y 3 3
R 2
4 . 7 u F