
32
Digitizer Application Information
Figure 2-4. Master Module Configuration Block Diagram.
1) The trigger source from the master can be
set with
TRIG:SOURce1,2 IMM | INT1-4 | EXT
| TTLT<n>
.
2)
TRIG:MODE MASTer0
drives the TTL
lines as if OUTPut:TTLT0:SOURce SAMPle
and
OUTPut:TTLT1:SOURce TRIGger have
been set
.
3) The master module generates the sample
signal that all modules (master and slaves)
initiate a measurement from.
4) MASTer0 sets the TTLT1 line as if it were
TRIG:SOUR1 TTLT1
. However, the query
TRIG:SOUR? will not return this setting. This
line is simply dedicated for synchronization
between the two modules in the master- slave
mode. You should not use this line for any
other purpose with the OUTPut, SAMPle or
TRIGger commands.
MODE
MASTer Sample Signal
MASTer0
TTLT2-7 | INT1-4 | EXT
MASTer2
TTLT0,1,4-7 | INT1-4 | EXT
MASTer4
TTLT0-3,6-7 | INT1-4 | EXT
MASTer6
TTLT0-5 | INT1-4 | EXT
TRIG:MODE
MASTer0 pairs TTLT0 (sample) with TTLT1 (trigger)
The MASTer0 module will function with all SLAVe0 modules.
Summary of Contents for E1563A
Page 8: ......
Page 24: ...24 Digitizer Module Set up ...
Page 84: ...84 Digitizer Command Reference ...
Page 110: ...110 ...
Page 138: ...138 HP E1563A and E1564A Register Based Programming Appendix B ...
Page 156: ...156 HP E1563A and E1564A Verification Tests ...