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4.11 Event Registers
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Event Status Register 0 (ESR0) Bit Assignments
Bit 7
Unused
Bit 6
COF
Constant current or constant voltage
Bit 5
LOF
Limit overflow
Bit 4
IOF
Impedance range overflow
Bit 3
IUF
Impedance range underflow
Bit 2
IDX
Data sampling completed
Bit 1
EOM
Measurement completed
Bit 0
CEM
Compensation data measurement completed
Event Status Register 1 (ESR1) Bit Assignments
Bit 7
Unused
Bit 6
AND
Logical product (AND) of comparison results (bit1, bit4)
Bit 5
SLO
Second parameter below lower limit
Bit 4
SIN
Second parameter within limits
Bit 3
SHI
Second parameter above upper limit
Bit 2
FLO
First parameter below lower limit
Bit 1
FIN
First parameter within limits
Bit 0
FHI
First parameter above upper limit
(2) Event status registers 0 and 1 (ESR0 and ESR1)
