GSi TYMPSTAR 1, Service Manual

Page: 182 / 224

Chapter 7
8. The DAT subsystem is initialized to allow for reading/writing of data to the Disk-
On-Chip as well as the SEREE (although the SEREE is not actually accessed at
this time – see below).
NOTE
SEREE is the serial EEPROM in the probe.
9. The I/O port read/write subsystem is initialized and all of the hardware I/O ports
in the system are initialized with known values to bring the hardware up to a
known state.
10. The FPGA is completely programmed (takes about 5 seconds) from the latest
FPGA.BIN file which resides on the DOC (should be put there as part of the
TympStar installation). We can detect errors programming the FPGA and failsafe
as needed (NOTE – if the LCD is not automatically turned on by the BIOS, you
will only see this failsafe code with the external CRT).
11. At this point the LCD is turned on. The latest BIOS enables the LCD from
power-on, but on prior versions of the BIOS it was necessary to manually
enable the LCD. Since this does no harm, we continue to do it in software
should the BIOS ever be changed to not enable the LCD on power-on.
12. The SEREE driver is loaded – the SEREE is checked to ensure that it is ready
to accept commands from the CP. The probe attached state is not checked yet.
13. The DPRAM is verified. Access to and integrity of the DPRAM is verified by
performing various tests such as the Data cell individually addressable test, the
Walking one data test, an the Walking zero data test. Failures are reported as
failsafe codes.
14. The Probe Serial Number as stored in SEREE is read. This will also determine
if a probe is attached – if no probe is attached we will still allow the normal boot,
but no access to the probe is allowed and no starting of any tests are allowed.
The state of the probe attached is saved globally for reference by all tasks in the
system.
15. The page data is now allocated in memory – and initialized with 26 blank tests.
We then check the warmstart flag in non-volatile memory (DOC)is preformed
to see if the unit are recovering from a failsafe/warmstart. If so, the page data is
read from the DOC and stored into the appropriate tests in page memory.
16. If the unit is not in a warmstart condition, remove any warmstart flags and page
data from non-volatile memory (both stored on the DOC).
17. The pump driver timer is loaded by the system with 125us timing resolution.
The pump driver is loaded later.
18. The RS232 port UART is initialized and the low level HW driver for received
serial characters is loaded. The baud rate and related settings are not set until
later (when the user saved instrument options are read from DOC).
19. The A/D conversion thread is loaded (for allA/D reading and this also calls the
Watchdog monitor routine; however, the watchdog is not yet running).
20. The Housekeeping thread is loaded (for basic system timing tasks, misc HW
checks, keyboard processing, etc) .
Grason-Stadler
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