86
Gateway ALR 9250R User’s Guide
PCI devices submenu
This submenu provides three fields that allow you to control certain
characteristics of the PCI expansion slots. The table below lists the fields
and options.
I/O device configuration submenu
This submenu contains fields to control the I/O ports on the back panel of
the system. The table below lists the fields and the options available for
each.
PCI Devices Submenu Fields
Field
Options
Description
Option ROM Scan
Enabled
Disabled
Enables the option ROM scan of all
devices other than the onboard SCSI
controllers.
Enable Master
Disabled
Enabled
Enables all devices, other than the
onboard SCSI controllers, as PCI bus
masters.
Latency Timer
Default
0020h
0040h
0060h
0080h
00A0h
00C0h
00E0h
Defines the minimum guaranteed time,
in units of PCI bus clocks, that a device
can be master on a PCI bus. Typically,
option ROM code overwrites the value
set by the BIOS.
I/O Device Configuration Submenu
Field
Options
Description
Serial Port A
Disabled
Enabled
Auto
OS Controlled
Auto forces the BIOS to configure the port.
OS Controlled is shown when the operat-
ing system controls the port.
Base I/O Address
3F8
2F8
3E8
2E8
Selects the base I/O address for COM port
A.
Interrupt
IRQ 4
IRQ 3
Selects the IRQ for COM port A.
9250R.book Page 86 Friday, April 9, 1999 9:44 AM
Summary of Contents for ALR 9250R
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