Description
This d
t and its contents are the property of CASSIDIAN
nd must not be copied or circul
1
2
3
4
5
Figure 2.9
BLOCK DIAGRAM OF THE SYNCHRONISATION BOARD
SYNCHRONISATION BOARD
Clock
monitoring
FAN 1
Duplexer 1
Clock +
Synchro
Management of
alarms
EXT
θ
°C
Config
IDR-IDO
-3
G
_M
C2_CA
R
TE_S
YNCHRO
&
A
LA
RMS
C
O
N
TRO
L_S
YNO
P
_01_
01
FAN 2
Sensor
θ
Duplexer
management
Duplexeur 2
(antenna
diversity
option)
SYNC
PWR
12V / 48 V
convertor
3V3L & 3V3
Configuration
Fan
management
TTL
/
V11
6.4 MHz pilot reference
6,4 MHz OUT
6,4 MHz IN
Internal alarm
To 2
nd
IDR IDO 3G
To 3G PA-TRX