S29VS256R
S29VS128R
S29XS256R
S29XS128R
256/128-Mbit (32/16 Mbyte), 1.8 V, 16-bit
Data Bus, Multiplexed MirrorBit
®
Flash
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document Number: 002-00833 Rev. *L
Revised May 27, 2019
Features
Single 1.8 V supply for read/program/erase (1.70–1.95 V)
65nm MirrorBit
®
Technology
Address and Data Interface Options
– Address and Data Multiplexed for reduced I/O count
(ADM) S29VS-R
– Address-High, Address-Low, Data Multiplexed for minimum
I/O count (AADM) S29XS-R
Simultaneous Read/Write operation
32-word Write Buffer
Bank architecture
– Eight-bank
Four 32-KB sectors at the top or bottom of memory array
255/127 of 128-KB sectors
Programmable linear (8/16-word) with wrap around and
continuous burst read modes
Secured Silicon Sector region consisting of 128 words each
for factory and customer
10-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector (typical)
RDY output indicates data available to system
Command set compatible with JEDEC (42.4) standard
Hardware sector protection via V
PP
pin
Handshaking by monitoring RDY
Offered Packages
– 44-ball FBGA (6.2 mm
7.7 mm
1.0 mm)
Low V
CC
write inhibit
Write operation status bits indicate program and erase
operation completion
Suspend and Resume commands for Program and Erase
operations
Asynchronous program operation, independent of burst
control register settings
V
PP
input pin to reduce factory programming time
Support for Common Flash Interface (CFI)
General Description
The Cypress S29VS256/128R and S29XS256/128R are MirrorBit
®
Flash products fabricated on 65nm process technology. These
burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate
banks using multiplexed data and address pins. These products can operate up to 108 MHz and use a single V
CC
of 1.7 V to 1.95 V
that makes them ideal for the demanding wireless applications of today that require higher density, better performance, and lowered
power consumption. The S29VS256/128R operates in ADM mode, while the S29XS256/128R can operate in the AADM mode.
Performance Characteristics
Read Access Times
Speed Option (MHz)
108
Max. Synch. Latency, ns (t
IA)
72.34
Max. Synch. Burst Access, ns (t
BACC)
6.75
Max. Asynch. Access Time, ns (t
ACC
)
80
Max OE# Access Time, ns (t
OE
)
15
Current Consumption (typical values)
Continuous Burst Read @ 108 MHz
32 mA
Simultaneous Operation @ 108 MHz
71 mA
Program/Erase
30 mA
Standby Mode
30 µA
Typical Program & Erase Times
Single Word Programming
170 µs
Effective Write Buffer Programming (V
CC
) Per
Word
14.1 µs
Effective Write Buffer Programming (V
PP
) Per
Word
9 µs
Sector Erase (16 Kword Sector)
350 ms
Sector Erase (64 Kword Sector)
800 ms
