Document Number: 002-00833 Rev. *L
Page 35 of 74
S29VS256R
S29VS128R
S29XS256R
S29XS128R
7.7.4
Chip Erase
The chip erase function erases the complete memory array. (See
). The device does not require the system to
preprogram prior to erase. The Embedded Erase algorithm automatically programs and verifies the entire memory for an all zero
data pattern prior to electrical erase. After a successful chip erase, all locations within the device contain FFFFh. The system is not
required to provide any controls or timings during these operations. Chip Erase requires 2 commands. Each of the Sector Addresses
must match, the lower addresses must be correct, and Sector 0 must be unlocked previously by executing the Sector Unlock
command. If any sector has been locked by the Sector Lock Range command, the Chip Erase command will not start.
When the Embedded Erase algorithm is complete, the device returns to idle state and addresses are no longer latched. Note that
while the Embedded Erase operation is in progress, the system can not read data from the device. The system can determine the
status of the erase operation by reading the Status Register. See
for information on these status bits.
Once the chip erase operation has begun, only a Status Read, Hardware RESET or Power cycle are valid. All other commands are
ignored. However, note that a Hardware Reset or Power Cycle immediately terminates the erase operation. If that occurs, the chip
erase command sequence must be reinitiated once the device has returned to idle state, to ensure data integrity.
See
Program/Erase Operations on page 30
for parameters and timing diagrams.
Software Functions and Sample Code
The following is a C source code example of using the chip erase function. Refer to the
Cypress Low Level Driver User’s Guide
(available on
) for general information on Cypress Flash memory software development guidelines.
/* Example: Chip Erase Command */
/* Note: Cannot be suspended */
*( (UINT16 *)bas 0x555 ) = 0x0080; /* write setup command */
*( (UINT16 *)bas 0x2AA ) = 0x0010; /* write chip erase command */
Table 34. Chip Erase
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Setup Command
Write
Base + AAAh
Base + 555h
0080h
2
Chip Erase Command
Write
Base + 555h
Base + 2AA
0010h
