Cypress S29VS128R, Manual

Page: 58 / 75

Document Number: 002-00833 Rev. *L Page 58 of 74
S29VS256R
S29VS128R
S29XS256R
S29XS128R
Legend:
X = Don’t care
RA = Address of the location to be read.
RD = Read Data from location RA during read operation.
RR = Read Register value
PA = Address of the memory location to be programmed.
PD = Data to be programmed at location PA.
BA = Address bits sufficient to select a bank
SA = Address bits sufficient to select a sector
SLA = Sector Lock Address
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Configuration Command Definitions
Config
uration
Re
gister
Configuration
Register Entry (7)
(10)
1
(SA) 555
(SA) AAA
D0
Write Buffer Load 3
(SA) 555
(SA) AAA
25
(SA) 2AA
(SA) 554
0 (SA) X00 PD
Buffer to Flash
(Configuration
Register)
1
(SA) 555
(SA) AAA
29
Configuration
Register Read
1 (SA) X00 RR
Configuration
Register Exit
1 XXX FO
SSR Lock Command Definitions
SSR Loc
k
SSR Lock Entry
(7) (10)
1
(SA) 555
(SA) AAA
40
Write Buffer Load (8) 3
(SA) 555
(SA) AAA
25
(SA) 2AA
(SA) 554
0 (SA) 00 PD
Buffer to Flash 1
(SA) 555
(SA) AAA
29
SSR Lock Read 1 (SA) XXX RR
SSR Lock Exit 1 XXX F0
Secure Silicon Region Command Definitions
Secure Sili
con Reg
ion
Secure Silicon
Region Entry (7) (10)
1
(SA) 555
(SA) AAA
88
Write Buffer Load (8) 3-34
(SA) 555
(SA) AAA
25
(SA) 2AA
(SA) 554
WC (SA) PA PD (SA) PA PD
Buffer to Flash 1
(SA) 555
(SA) AAA
29
Secure Silicon
Region Read
1 (SA) RA RD
Secure Silicon
Region Exit
1 XXX F0
Table 43. Command Definitions (Continued)
Command Sequence
Cycles
Bus Cycles (Notes 1 – 4 )
First Second Third Fourth
Addr Data Addr Data Addr Data Addr Data