Document Number: 002-00833 Rev. *L
Page 59 of 74
S29VS256R
S29VS128R
S29XS256R
S29XS128R
Notes:
1. See
Section 7., Device Operations on page 17
for description of bus operations.
2. Except for the following, all bus cycles are write cycle: read cycle during Read, ID/CFI Read (Manufacturing ID, Device ID, Indicator Bits), Configuration Register read,
Secure Silicon Region Read, SSR Lock Read, and 2nd cycle of Status Register Read.
3. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD, PD, and WD.
4. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset
command to return the device to reading array data.
5. The Program Resume command is valid only during the Program Suspend mode/state.
6. The Erase Resume command is valid only during the Erase Suspend mode/state.
7. Command is valid when all banks are ready to read array data.
8. The total number of cycles in the command sequence is determined by the number of words written to the write buffer.
9. V
PP
must be at V
HH
during the entire operation of this command.
10. Entry commands are needed to enter a specific mode to enable instructions only available within that mode.
11. Must be the lowest word address of the words being programmed within the 32 word write buffer page. This is not necessarily the lowest address of the page. Data
words are loaded into the write page buffer in sequential order from lowest to highest address.
12. Subsequent addresses must fall within the same Sector and Page as the initial starting address.
13. Blank Check is only functional in Asynchronous Read mode (Configuration Register - CR [15] = 1).
11.2
Device ID and Common Flash Memory Interface Address Map
The Device ID fields occupy the first 32 bytes of address space followed by the Common Flash Interface data structure. The
Common Flash Interface (CFI) specification defines a standardized data structure containing device specific parameter, structure,
and feature set information, which allows vendor-specified software algorithms to be used for entire families of devices. Software
support can then be device-independent, JEDEC ID-independent, and forward- and back-ward-compatible for the specified flash
device families. Flash driver software can be standardized for long-term compatibility.
This device enters the ID/CFI mode when the system writes the ID/CFI Query command, 90h or 98h, to address (SA)55h any time
all banks are in read mode (the CU is in Idle State). The system can then read ID and CFI information at the addresses, within the
selected sector, given in the following tables. To terminate reading ID/CFI, the system must write the reset command.
