Document Number: 002-00833 Rev. *L
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S29VS256R
S29VS128R
S29XS256R
S29XS128R
5.
Product Overview
The S29VS/XS-R family is 1.8-V only, simultaneous read/write, burst-mode, Flash devices. These devices have a 16 bit (word) wide
data bus. All read accesses provide 16 bits of data on each bus transfer cycle. All writes take 16 bits of data from each bus transfer
cycle.
The Flash memory array is divided into banks. A bank is the address range within which one program, or erase operation may be in
progress at the same time as one read operation is in progress in any other bank of the memory. This multiple bank structure
enables Simultaneous Read and Write (SRW) so that code may be executed or data read from one bank while a group of data is
programmed, or erased as a background task in one other bank.
Each bank is divided into sectors. A sector is the minimum address range of data which can be erased to an all Ones state. Most of
the sectors are 128 KBytes each. Depending on the option ordered, either the top-4 sectors or the bottom-4 sectors are 32 KBytes
each. These are called boot sectors because they are often used for holding boot code or parameters that need to be protected or
erased separately from other data in the Flash array.
Programming is done via a 64 Byte write buffer. It is possible to program from one to 32 words (64 bytes) in each programming
operation.
The S29VS/XS family is capable of continuous, synchronous (burst) read or linear read (8- or 16-word aligned group) with wrap
around. A wrapped burst begins at the initial location and continues to the end of an 8, or 16-word aligned group then
“wraps-around” to continue at the beginning of the 8, or 16-word aligned group. The burst completes with the last word before the
initial location. Word wrap around burst is generally used for processor cache line fill.
Device
Mbits
Mbytes
Mwords
Banks
Mbytes / Bank
S29VS128R/S29XS128R
128
16
8
8
2
S29VS256R/S29XS256R
256
32
16
8
4
