Document Number: 002-00833 Rev. *L
Page 5 of 74
S29VS256R
S29VS128R
S29XS256R
S29XS128R
3.
Block Diagram
Figure 1. Simultaneous Operation Circuit
Notes:
1. Amax = A23 for S29VS/XS256R, A22 for S29VS/XS128R.
2. Bank(n) = 8 (S29VS/XS256/128R).
V
SS
V
CC
Bank Address
RESET#
VPP
WE#
CE#
AVD#
RDY
DQ15–DQ0
STATE
CONTROL
&
COMMAND
REGISTER
Bank 1
X-Decoder
Y
-Decoder
Latches and
Control Logic
Bank 0
X-Decoder
Y
-Decoder
Latches and
Control Logic
DQ15–DQ0
DQ15–DQ0
DQ15–DQ0
DQ15–DQ0
DQ15–DQ0
Bank (n-1)
Y
-Decoder
X-Decoder
Latches and
Control Logic
Bank (n)
Y
-Decoder
X-Decoder
Latches and
Control Logic
OE#
Status
Control
Amax–A0
Amax–A0
Amax–A0
Amax–A0
Bank Address
Bank Address
Bank Address
V
SSQ
