Cypress S29VS128R, Manual

Page: 73 / 75

Document Number: 002-00833 Rev. *L Page 73 of 74
S29VS256R
S29VS128R
S29XS256R
S29XS128R
*D (Cont.) – WIOB 05/26/2010 Figure Latency with Boundary Crossing
Corrected CR8 setting in Notes 1 and 2
Figure Latency with Boundary Crossing into Bank Performing Embedded
Operation
Corrected CR8 setting in Notes 1 and 2
Figures Asynchronous Read - AADM Interface to Asynchronous Write
Followed By Write - AADM Interface
Clarified CLK waveform behavior
Figure Synchronous Write Followed By Read Burst - AADM Interface
Corrected Figure title
ADM Interface (S29VS256R and S29VS128R)
Clarified traditional interface
Table Wait State vs. Frequency
Modified title and added note
Table Address Latency for 10–13 Wait States
Added note
Table Address Latency for 9 Wait States
Added note
Figure Synchronous Read
Removed note 1
CLK Characterization
Removed note 2
Erase and Programming Performance
Corrected note 2
*E – WIOB 07/22/2010 DC Characteristics
Changed ICC Read test conditions to OE#=H with relevant values
Performance Characteristics
Updated tables
Erase and Programming Performance
Changed typical programming times
*F – WIOB 11/18/2010 Erase and Programming Performance
Changed maximum chip erase times
ID/CFI Data
Corrected Data and Description for Word Offset 03h, 55h, 56h
Corrected Data for Word Offset 1Dh, 1Eh, 52h
*G – WIOB 07/30/2012 Command Definitions
Corrected number of cycles for Write Buffer Load
*H 5043055 WIOB 12/17/2015 Changed status from Advance to Final.
Updated to Cypress template.
*I 5632749 WIOB 02/16/2017 Updated Electrical Specifications :
Updated V
CC
Power-Up and Power Down :
Added description.
Added V
RST
, t
PD
parameters and their corresponding details in the
table.
Added
Figure 10 and Figure 11 .
Updated to new template.
*J 5967674 AESATMP8 11/15/2017 Updated Cypress Logo and Copyright.
*K 6269679 PRIT 08/09/2018 Updated to new template.
Completing Sunset Review.
Document History Page (Continued)
Document Title: S29VS256R/S29VS128R/S29XS256R/S29XS128R, 256/128-Mbit (32/16 Mbyte), 1.8 V, 16-bit Data Bus,
Multiplexed MirrorBit
®
Flash
Document Number: 002-00833
Rev. ECN No.
Orig. of
Change
Submission
Date
Description of Change