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DL06 Micro PLC User Manual, 3rd Edition, Rev. E
3-16
Chapter 3: CPU Specifications and Operation
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Solve Application Program
The CPU evaluates each instruction in the
application program during this segment of the
scan cycle. The instructions define the relationship
between the input conditions and the desired
output response. The CPU uses the output image
register area to store the status of the desired action
for the outputs. Output image register locations
are designated with a Y followed by a memory
location. The actual outputs are updated during the
write outputs segment of the scan cycle. There are
immediate output instructions available that will
update the output points immediately instead of
waiting until the write output segment. A complete
list of the Immediate instructions is provided in
Chapter 5.
The internal control relays (C), the stages (S), and
the variable memory (V) are also updated in this
segment.
You may recall that you can force various types
of points in the system, discussed earlier in this
chapter. If any I/O points or memory data have been
forced, the output image register also contains this
information.
Solve PID Loop Equations
The DL06 CPU can process up to 8 PID loops. The loop calculations are run as a separate
task from the ladder program execution, immediately following it. Only loops which have been
configured are calculated, and then only according to a built-in loop scheduler. The sample
time (calculation interval) of each loop is programmable. Please refer to Chapter 8, PID Loop
Operation, for more on the effects of PID loop calculation on the overall CPU scan time.
Write Outputs
Once the application program has solved the instruction logic and constructed the output
image register, the CPU writes the contents of the output image register to the corresponding
output points. Remember, the CPU also made sure that any forcing operation changes were
stored in the output image register, so the forced points get updated with the status specified
earlier.
Write Outputs to Specialty I/O
After the CPU updates the outputs in the local and expansion bases, it sends the output point
information that is required by any Specialty modules which are installed. Specialty modules
have built-in microprocessors which communicate to the CPU via the backplane. Some of
these modules can process data. Refer to the specific Specialty module user manual for detailed
information.
Download
Program
Read Inputs from Specialty I/O
Solve the Application Program
Write Outputs
Diagnostics
Update Special Relays
Service Peripherals
Normal Run mode scan
LOGIC
K oyo
06
C0 C4 C2 X1 X3 X4 X6 X11 X13 X14 X16 X21 X23 N.C.
C1 C3 X2 X5 X7 X10 X12 X15 X17 X20 X22 X0 N.C.
AC(N) 24V
0V
N.C.
C1 C3 Y0 Y15 Y12 Y10 Y17 Y7 Y5 Y2
C0 C2 Y16 Y14 Y13 Y11 Y6 Y4 Y3 Y1
LG G
AC(L)
D0-06DR
2.0A OUTPUT: 6-240V 50 - 60Hz 2.0A, 6 - 27V
INPUT: 12 - 24V 3 - 15mA
Y
X
40VA 50-60Hz PWR: 100-240V
0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22 23
PORT1 PORT2
TERM
RUN STOP
PWR
RUN
CPU
TX1
RX1
TX2
RX2
LOGIC
K oyo
06
C0 C4 C2 X1 X3 X4 X6 X11 X13 X14 X16 X21 X23 N.C.
C1 C3 X2 X5 X7 X10 X12 X15 X17 X20 X22 X0 N.C.
AC(N) 24V
0V
N.C.
C1 C3 Y0 Y15 Y12 Y10 Y17 Y7 Y5 Y2
C0 C2 Y16 Y14 Y13 Y11 Y6 Y4 Y3 Y1
LG G
AC(L)
D0-06DR
2.0A OUTPUT: 6-240V 50 - 60Hz 2.0A, 6 - 27V
INPUT: 12 - 24V 3 - 15mA
Y
X
40VA 50-60Hz PWR: 100-240V
0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22 23
PORT1 PORT2
TERM
RUN STOP
PWR
RUN
CPU
TX1
RX1
TX2
RX2
from Specialty I/O