FireFinder
™
Installation Commissioning & Operation
Page 19
5.21 Slave CPU 302-669
The Slave CPU (Central Processing Unit) provides the interfacing signals and I/O’s required to allow the
FACP to connect / communicate to a variety of termination boards.
A single chip micro controller U1 controls all operations of the FACP Slave CPU. This device contains the
control program within Read Only Memory (ROM).
Communication to the main system is via an eight bit bi-directional bus (CN1). Integrated circuits U5, U3
and U7 provide buffering and data latches that allow data flow between the Main and Slave CPU’s. The
buffers hold one output byte and two input bytes.
CN1 provides the interconnection to the Termination Board. Within CN1 are ten analogue input lines, two
input/output lines, two current loop outputs (RS422) and one current loop input (RS422).
All analogue inputs are de-coupled then fed to an eight-bit analogue to digital converter (ADC) U4. The
data from the ADC is sent via a serial peripheral interface to the micro controller U8.
The current loop inputs and outputs are used to provide various signals according to the board connected.
The signals provided can be serial peripheral interface clock and data signals or full duplex asynchronous
data and a timing output. U6 provides the signal multiplexing and buffering required to switch between
different functions.
Automatic Termination Board Sensing
A unique feature of the Slave CPU is its ability to automatically sense the type of board it is connected to
without the user having to configure the board to suit. Board sensing is done by measuring the voltage on
analogue input ten (CN1-10), denoted
Type Voltage
. Each termination board provides a unique predefined
voltage. After the Slave CPU has determined the board type the Slave CPU will set the appropriate
operating conditions, signal the Main CPU of the installed type and wait for the Main CPU to inform the
Slave to begin executing the program.
Connections
Connector
Connects to
CN1
302-735, 302-671 and 302-672
CN2
Main Connection Board (BRD85MBA)
Figure 23: Slave CPU Board
U9
TLC542
U4
U3
U8
U2
U6
U7
U5
X1
CN2
1
1
1
1
1
302-696
CN1
U1
Ma
in
B
o
a
rd
Summary of Contents for SP Series
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