Altera Cyclone IV, Device Handbook

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Chapter 2: Cyclone IV Reset Control and Power Down 2–11
Transceiver Reset Sequences
September 2014 Altera Corporation Cyclone IV Device Handbook,
Volume 2
Transmitter Only Channel
This configuration contains only a transmitter channel. If you create a Transmitter
Only instance in the ALTGX MegaWizard Plug-In Manager, use the same reset
sequence shown in Figure 2–3 on page 2–7 .
Receiver Only Channel—Receiver CDR in Automatic Lock Mode
This configuration contains only a receiver channel. If you create a Receiver Only
instance in the ALTGX MegaWizard Plug-In Manager with the receiver CDR in
automatic lock mode, use the reset sequence shown in
Figure 2–6 .
As shown in Figure 2–6 , perform the following reset procedure for the receiver in
CDR automatic lock mode:
1. After power up, wait for the
busy
signal to be deasserted.
2. Keep the
rx_digitalreset
and
rx_analogreset
signals asserted during this time
period.
3. After the busy signal is deasserted, wait for another two parallel clock cycles, then
deassert the
rx_analogreset
signal.
4. Wait for the
rx_freqlocked
signal to go high.
5. When
rx_freqlocked
goes high (marker 3), from that point onwards, wait for
at least t
LTD_Auto
, then de-assert the
rx_digitalreset
signal (marker 4). At this
point, the receiver is ready to receive data.
Figure 2–6. Sample Reset Sequence of Receiver Only Channel—Receiver CDR in Automatic Lock Mode
Notes to Figure 2–6 :
(1) For t
LTD_Auto
duration, refer to the Cyclone IV Device Datasheet chapter.
(2) The
busy
signal is asserted and deasserted only during initial power up when offset cancellation occurs. In subsequent reset sequences, the
busy
signal is asserted and deasserted only if there is a read or write operation to the ALTGX_RECONFIG megafunction.
Reset Signals
2
Output Status Signals
3
4
1
Two parallel clock cycles
rx_analogreset
rx_digitalreset
busy (2)
rx_freqlocked
t
LTD_Auto
(1)