Agilent Technologies 86100A, Programmer'S Manual, Page: 117 / 366

4-9
Root Level Commands
LTEE
This query reads the Local (LCL) Event Register. A “1” is returned if a remote-to-local transi-
tion has taken place due to the front-panel Local key being pressed. A “0” is returned if a
remote-to-local transition has not taken place. After the LCL Event Register is read, it is
cleared. Once this bit is set, it can only be cleared by reading the Status Byte, reading the reg-
ister with the LER? query, or sending a *CLS common command.
Returned Format [:LER] {1 | 0}<NL>
Example 10 OUTPUT 707;":LER?"
LTEE
Command :LTEE <mask>
This command sets a mask into the Limit Test Event Enable register. A “1” in a bit position
enables the corresponding bit in the Limit Event Register to set bit 8 in the Operation Status
Register. <mask> is the decimal weight of the enabled bits. Only bits 0 and 1 of the Limit Test
Event Register, are used at this time. The following table shows the enabled bits for each use-
ful mask value. Bits that are not marked as enabled for a mask are blocked from affecting the
operation status register.
Query :LTEE?
Returned Format [:LTEE] <mask><NL>
LTER?
Query :LTER?
This query returns the current value of the Limit Test Event Register as a decimal number
and also clears this register. Bit 0 (COMP) of the Limit Test Event Register is set when the
Limit Test completes. The Limit Test completion criteria are set by the LTESt:RUN com-
mand. Bit 1 (FAIL) of the Limit Test Event Register is set when the Limit Test fails. Failure
criteria for the Limit Test are defined by the LTESt:FAIL command.
Returned Format [:LTER] <value><NL>
MODel?
Query :MODel? {FRAMe | LMODule | RMODule}
This query returns the Agilent model number for the analyzer frame or module.
Returned Format [:MODel] <string>
Table 4-4. Enabled Bits for Mask Values
Mask Value Bit 1 FAIL Bit 0 COMP
0
1 •
2 •
3 • •