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Clock Stop Mode
6-3
SPI Operation Using the Clock Stop Mode
SPRU592E
6.2 Clock Stop Mode
The clock stop mode of the McBSP provides compatibility with the SPI
protocol. When the McBSP is configured in clock stop mode, the transmitter
and receiver are internally synchronized, so that the McBSP functions as an
SPI master or slave device. The transmit clock signal (CLKX) corresponds to
the serial clock signal (SCK) of the SPI protocol, while the transmit
frame-synchronization signal (FSX) is used as the slave-enable signal (SS).
The receive clock signal (CLKR) and receive frame-synchronization signal
(FSR) are not used in the clock stop mode because these signals are internally
connected to their transmit counterparts, CLKX and FSX.
Содержание TMS320VC5509
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