9-2
PDW-HD1500/V1 (E)
When recording format is IMX, the SD digital video signal is divided inside LVIS into the one that is sent to the ENC-107
board for the record signal process system and the one that is returned to VAX again as the HD video output system of the
E-E image after up-conversion.
On the ENC-107 board, the encoding and compression processes are performed by the MPEG IMX encoder MIKE
(IC1202).
The digital encoded and compressed stream signal is sent to PIER (IC2103) on the HPR-23 board and is written into the
PIER SDRAM.
When recording format is DVCAM, the digital video signal is divided inside LVIS into the one that is sent to the internal
DVCAM encode processing block and the one that is returned to VAX again as the HD video output system of the E-E
image after up-conversion.
The digital stream signal that is encoded and compressed by the DVCAM encode processing block inside LVIS is sent to
PIER (IC2103) on the HPR-23 board and is written into the PIER SDRAM.
In addition, the SD digital video signal that is input to LVIS is divided regardless of the recording format, into the one that
is returned to VAX again as the SD video output signal of E-E image and the one for creating the proxy video data in
LVIS. The proxy video data that is encoded and compressed inside LVIS is sent to PIER to be written into the PIER
SDRAM.
i.LINK input (FAM)
The record digital data input from the i.LINK connector (CN1) on the NET-4 board is sent from the connector (CN100) to
the connector (CN2) of the IF-1073 board on the HPR-23 board via the harness. Then, the record digital data is sent to the
FAM Accelerator (IC1201) of the HPR-23 board via i.LINK PHY (IC1). After that, it is sent to PIER through the PCI BUS
to be written into the PIER SDRAM.
Network input
The record digital data input from the network connector (CN2) on the NET-4 board is converted into the parallel data by
the Ethernet interface IC (IC1300). Then, it is sent to PIER via the PCI bridge in the PHOT (IC801) on the HPR-23 board
through the PCI BUS controlled by the LINUX CPU (IC1) to be written into the PIER SDRAM.
When recording to a disc, the PIER SDRAM data is sent to the drive block through the ATA66 interface.
In addition, the proxy video data needs to be created for the i.LINK input and the network input, so the record video data of
the PIER SDRAM is sent from PIER to the ENC-107 board and decoded by the MPEG HD decoder TORINO (IC801,
1001), and then sent to LVIS on the HPR-23 board.
The proxy video data created by being down-converted, decoded and compressed in LVIS is sent back to PIER and then
written into the PIER SDRAM.
Playback System
The playback video/audio data and the playback proxy video/audio data are sent from the drive block through the ATA66
interface to PIER (IC2103) on the HPR-23 board to be written into the PIER SDRAM.
The playback video data of the PIER SDRAM is, when it is the HD format (HD422, HD420), sent to the ENC-107 board
from the PIER, decoded into the HD playback video signal by the MPEG HD decoder TORINO (IC801, IC1001) and is
sent to LVIS (IC501) on the HPR-23 board as the HD playback video signal.
When the playback video data is IMX format (HD422, HD420), the signal is sent from PIER to the ENC-107 board in the
same manner as the HD format signal. The signal is decoded into the SD playback video signal by the MPEG HD decoder
TORINO (IC801, IC1001) and is sent to LVIS (IC501) on the HPR-23 board.
When the playback video data is DVCAM format, the signal is directly sent to LVIS (IC501) from PIER and is decoded
into the SD playback video signal by the DVCAM decoder process block inside LVIS.
Содержание XDCAM PDW-HD1500
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Страница 160: ...Printed in Japan Sony Corporation 2009 6 16 2008 PDW HD1500 SY PDW HD1500 CN E 9 968 423 04 ...