Sony XDCAM PDW-HD1500, Руководство по обслуживанию

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9-1
PDW-HD1500/V1 (E)
Section 9
Circuit Description
This section describes circuits of the following categories. The overall block diagrams will help you understand the circuits
well.
1. Video signal processing system
2. Audio signal processing system
3. Sync signal processing system
4. System control system
5. I/O interfaces, network processing system
6. Optical drive system
1. Video Signal Processing System
Recording System
HDSDI input
The SD/HDSDI signal input from the HDSDI INPUT connector is input into the connector (CN500) of the RX-93 board on
the VPR-99 board and equalized (IC500). Then, the serial/parallel conversion is performed by FPGA (IC300) to the signal
is separated into the video signal and audio signal and extracted.
The ANC data (LTC, VITC, UMID, essence mark) is read and sent to the HPR-23 board via the VPR-99 board.
The HD digital video signal sent to the HPR-23 board is sent to VAX (IC206) and then sent to LVIS (IC501) after various
input systems are detected.
At LVIS, the HD digital video signals are divided into the one that is sent to the ENC-107 board as the record signal
process system and the one that is returned to VAX again as the video output system of the E-E image.
On the ENC-107 board, the amount of encoding is estimated as the pre-encoding processing by the MPEG HD encoder
TORINO (IC201) and the encoding and compression processes are performed by the TORINO (IC401, 601) based on the
estimated value.
The digital encoded and compressed stream signal is sent to PIER (IC2103) on the HPR-23 board to be written into the
PIER SDRAM.
In addition, the signals are down-converted inside LVIS and divided into the one that is returned to VAX again as the video
output signal and the one for creating the proxy video data in LVIS. The encoded and compressed proxy video data is sent
to PIER to be written into the PIER SDRAM.
SDSDI input
The SDSDI signal input from the SD/HDSDI INPUT connector is routed to the connector (CN500) of the RX-93 board on
the VPR-99 board and equalized (IC500). Then, the serial/parallel conversion is performed by FPGA (IC300).
The ANC data (LTC, VITC, UMID, essence mark) is read and sent to the HPR-23 board via the VPR-99 board.
The SD digital video signal sent to the HPR-23 board is routed to VAX (IC206) where various input systems are detected,
and is separated into the video signal and audio signal and extracted. They the SD digital video signal is sent to LVIS
(IC501).
When recording format is HD (HD422, HD420), the SD digital video signal is up-converted inside LVIS, and is divided
into the one that is sent to the ENC-107 board for the record signal process system and the one that is returned to VAX
again as the video output system of the E-E image.
On the ENC-107 board, the amount of encoding is estimated as the pre-encoding processing by the MPEG HD encoder
TORINO (IC201) and the encoding and compression processes are performed by the TORINO (IC401, 601) based on the
estimated value.
The digital encoded and compressed stream signal is sent to PIER (IC2103) on the HPR-23 board and is written into the
PIER SDRAM.