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PROCESSOR TECHNOLOGY CORPORATION
Sol THEORY OF OPERATION SECTION VIII
following release of KEY. On the third cycle the circuit reverts to
its original state.
This circuit, comprised of U20, U26, U16 and U17 serves two
functions. By requiring two events during two consecutive count cy-
cles before generating a KEY, it discriminates against false key clo-
sures. It also insures that multiple key strokes are serviced in or-
der. (This is the n-key rollover feature.) That is because the row-
column addresses are continuously presented to U20 and this circuit's
cycle can occur for each possible key closure. U20 can thus contain
data for all possible key closures, and the data will enter U1 and U2
on the KEY generated for each closure as the row-column count pro-
gresses.
The previously mentioned column 30 output on pin 4 of U17
drives the keyboard control key "switches". Data for these key clo-
sures, present on pins 1, 2 and 3 of addressable latch U12 is latched
in U12 during Clock 8 and
φ
2 when column 30 is driven. Pin 13 of U12
is connected to the complement of PKD_minus_1. Thus, the data
(active low) is strobed into U12 on the first count cycle. During
the third count it will be strobed again and a high is read in. When
the key is released, a low is strobed in again. As a result, a high
active pulse appears on the output line related to the key that was
closed for the duration of the key closure.
SHIFT and SHIFT_LOCK, on pins 11 and 10 respectively, are
applied through U23 inverter stages to NOR gates U13 and U14. These
are connected as a cross-coupled flip-flop. An active SHIFT sets
this flip-flop at pin 5 of U13 to make output pin 6 of U13 and output
pin 3 of U14 high. The latter is connected to pin 3 of U18, a 512 x
4 bit ROM. U18 is programmed to output the high-order four bits of
the data to U1 according to the states of pins 1, 2 or 3.
The U13-14 flip-flop is set to a high on pin 6 if SHIFT_LOCK
is active. As can be seen, the shift bit to U18 is high by virtue of
the low on pin 6 of U13 and it will remain so until SHIFT again
causes U13-14 to change state. When output pin 6 of U14 is high, pin
12 of U24 is low to turn light emitting diode LED1 on. This LED is
located in the SHIFT_LOCK key and indicates the keyboard is in a
locked shift condition.
When UPPER_CASE is active, pin 7 of U12 goes high to clock D
flip-flop Ul5 on pin 3. This flip-flop is connected to operate in a
toggle mode. On the UPPER_CASE "clock", pin 5 of U15 goes to make
pin 2 of U18 low. The high on pin 6 of U15 is inverted by U24 to
turn on LED2. LED2 is located in the UPPER CASE key. A second clo-
sure of this key toggles U15 to the opposite condition.
Now assume the LOCAL key is depressed, the output on pin 5 of
U12 goes active high to clock the other D flip-flop U15 stage at pin
11. This stage also operates as a toggle, and output pin 9 goes low
to become LOCAL on pin 14 of J1. Again, the high on output pin 8
VIII-44
Содержание Sol-PC
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Страница 114: ...PROCESSOR TECHNOLOGY CORPORATION Sol OPERATING PROCEDURES SECTION VII VII 6 Figure 7 1 Connecting the basic Sol system...
Страница 126: ...PROCESSOR TECHNOLOGY CORPORATION Sol OPERATING PROCEDURES SECTION VII VII 18 Table 7 4 Sol Keyboard Assignments...
Страница 151: ...VIII 11...
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Страница 187: ...SECTION IX SOFTWARE Sol TERMINAL COMPUTERTM Processor Technology...
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