Processor Technology Sol-PC, Руководство пользователя

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PROCESSOR TECHNOLOGY CORPORATION
Sol THEORY OF OPERATION SECTION VIII
In the Sol, the display format is 64 characters maximum per
character row, with a maximum of 16 rows per frame (page). Thus,
up to 1024 characters can be displayed per page.
A 9x13 (columns by lines) dot area, or character position,
is alloted on the monitor screen for each displayed character (see
Figures 8-2 and 8-3 on Page VIII-24). Consequently, each character
row consisting of sixty-four 9 x 13 dot areas requires 13 horizontal
scan lines. To provide spacing between both characters and rows,
only 12 dot lines and seven dot columns within the 9 x 13 matrix are
used for character display. Only nine of the available 12 dot lines,
however, are used for any given character.
Let's take a closer look at how the 9 x 13 dot matrix is used.
The first seven dot columns are available for all character displays;
the last two are used to provide a space between characters. The
first dot line in a character row is always blank to provide a space
between character rows. As shown in Figure 8-2, the second through
tenth dot lines are available for all upper case (capital) and con-
trol characters, all symbol and punctuation marks (except the comma
and semicolon), and all lower case characters (except the g, j, p,
q and y). As shown in Figure 8-3, dot lines five through 13 are
available to display characters that normally extend below the base
line--lower case g, j, p, q and y plus the comma and semicolon.
Now that we have a feeling for how characters are formed on
the video monitor screen, we will move on to the circuit description.
Refer to Display Section Schematic in Section X, Page X-18.
The 14.31818 MHz DOT_CLOCK, which defines the period of one
dot (69.8 nsec) in a character display matrix, controls all timing
in the Video Display Generator. DOT_CLOCK is applied to pin 2 of
U28, a four-bit binary counter that is preset to count from seven
through 15 to divide DOT_CLOCK by nine. Two 1.591 MHz outputs are
supplied by U28: LOAD_CLOCK on pin 11 and !CHARACTER_CLOCK on pin 12.
Pin 11 is a low-active pulse of one DOT_CLOCK duration. Pin 12 is
high for five and low for four DOT_CLOCK periods. Both the LOAD_ and
!CHARACTER_CLOCK low-to-high transitions occur synchronously on the
same DOT_CLOCK.
!CHARACTER_CLOCK, which defines the period of one character
position (628 nsec), is inverted in U49 to become CHARACTER_CLOCK.
It performs most of the clocking functions in the Video Display Gen-
erator and is made available on pin 4 of J4 for use by external
graphic display devices.
CHARACTER_CLOCK is in turn divided in U31 and U33, both of
which are presettable four-bit binary counters. Both start at count
3 when pin 8 of NAND gate U47 is low, and together they count 102
CHARACTER_CLOCKS to define horizontal timing at 64 usec (102 x 628
nsec = 64 usec).
VIII-23