Processor Technology Sol-PC, Руководство пользователя

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PROCESSOR TECHNOLOGY CORPORATION
Sol THEORY OF OPERATION SECTION VIII
the high or low speed clocks. Specifically, A must be high and B low
to select high speed clocks; the converse condition selects low speed
clocks. The select inputs are supplied by TAPE_HI_SPEED and
!TAPE_HI_SPEED.
The output of the second section on pin 11 of U111 is BYTE_
WRITE_CLOCK, 4800 Hz on low speed and 19.2 KHz on high speed. The
third section outputs a 19.2 KHz (high speed) or 38.4 KHz (low speed)
timing signal to input pin 10 of binary up counter (U112).
RECOVER_CLOCK is produced by a phase locked loop (U110), ano-
ther U112 binary up counter and the first and fourth sections of U111.
The signal input (pin 14) to U110 is supplied from output pin 1 of D
flip-flop U113. It is a constant frequency, regardless of whether
one or two transitions are detected in the read data during the
count out time (12 counts) of the U112 counter with outputs on pins
13 and 14. A phase comparator in U110 compares the signal input to
the output of a voltage controlled oscillator (VCO) in U110 (pin 4).
By feeding the VCO output through a counter (the other half of U112)
before feeding the counter output back to the compare input (pin 3)
of U110, the circuit acts as a frequency multiplier. The output of
this circuit remains locked, therefore, to a multiple of the signal
input on pin 14 of U110.
The output of U110 is nominally 19.2 KHz. The actual output
is determined by the signal input which in turn is a function of tape
speed. In other words, the phase lock loop circuit tracks input fre-
quency variations. And it will track such variations within its
locking range which is determined by the setting of variable resistor
VR3 (connected to pin 12 of U110).
For high speed, the divide-by-four output of U112 (pin 4) is
selected as RECOVER_CLOCK. For low speed, the VCO output of U110 is
selected for RECOVER_CLOCK. This clock serves as read clock for the
CDI UART, U69.
CDI control involves !PORT_IN_FA, !PORT_IN_FB, !PORT_OUT_FB,
TAPE_CONTROL_1 and _2, POC (power on clear), TAPE_HIGH_SPEED and
!TAPE_HI_SPEED. The last two were previously explained in the dis-
cussion of U111. !PORT_IN_FA strobes the CDI UART status (DR, TBRE,
OE and FE--refer to Page VIII-22 for definitions) to the Internal
Data Bus, INT3-7. !PORT_IN_FB strobes received data on pins 5-12 of
U69 to the Internal Data Bus, INT0-7. !PORT_OUT_FB loads data from
the Bidirectional Data Bus (DIO0-7) into U69. POC simply resets
U69 whenever power is applied to the Sol.
TAPE_CONTROL_1 and _2 are used to turn one or two recorder
motors on and off. An active low TAPE_CONTROL_1 energizes K1 to
close its contacts and turn recorder #l on; a high de-energizes K1 to
turn the recorder off. TAPE_CONTROL_2 does the same thing with K2 to
control another recorder. Diodes D13 and 14, which shunt K1 and K2
VIII-34