Processor Technology Sol-PC, Руководство пользователя

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PROCESSOR TECHNOLOGY CORPORATION
Sol THEORY OF OPERATION SECTION VIII
Returning to the SDI UART, we see that its transmitter output
on pin 25 is applied to pin 5 of U55, a two-input NAND gate that is
functionally a NOR gate. It is normally enabled on pin 4 by pull-up
resistor R44. A low on pin 5 represents a binary 0; a high repre-
sents a binary 1. The inverted output on pin 6 of U55 is again
inverted (assuming Sol is not operating in Local) by the following
U55 NAND gate. One-half of operational amplifier U56, operating open
loop, converts TTL levels to RS-232 levels (5 to 15 volts). Pin 3 of
U56 is held at +2.5 V dc by the R47 and R48 divider network. When
pin 2 is more negative than pin 3, the output on pin 1 of U56, which
is fed to pin 2 of J1, is at approxi10 volts. For the oppo-
site condition, pin 2 of J1 is about -10 volts. Thus, U56 also
inverts, and a high or low on pin 2 of J1 represent a binary 1 and 0
respectively.
Two conditions can override transmitted data: a keyboard
break (!BRK) or local (!KBD_LOC) command. For a break command, !BRK on
pin 4 of J3 and pin 4 of NOR gate U55, is low to hold pin 6 of U55
high for the duration of the !BRK signal. This appears as a "space",
or high level, on pin 2 of J1. (A space, or break, condition re-
quires that the space level exist for a period longer than the normal
length of a character.) In the case of a !KBD_LOC command from the
keyboard, pins 1 and 13 of the other two U55 sections are low. Thus,
data cannot be transmitted to pin 3 of NAND gate U55, and pin 11 of
NOR gate U55 is held high to enable tri-state driver U37 at pin 15.
Data on pin 6 of U55 is consequently looped back by way of U37 and
R21 to pin 12 of U38. Data on pin 12 of U38 overrides any data ar-
riving at pin 13 of U38. In local operation, therefore, data from
pin 25 of the UART does not appear at pin 2 of J1, but it is looped
back to the receiver input (pin 20) of the UART via U37, R21 and U38.
Notice that data on pin 25 of the UART will also be looped
back if S4-6 is closed (half duplex operation). But in this case,
data from the UART is also fed to pin 2 of J1.
Serial data from the UART that appears at pin 1 of U56 also
drives transistor Q1 by way of R45 and R46 to supply the serial cur-
rent loop output (SCLO) on pin 11 of J1. Q1 supplies 20 ma. (max.)
current for a binary 1 and no current for a binary 0.
Pin 23 of J1 (connected through R23 to +12 V dc) is the
serial loop current source (SLCS). It can supply up to 20 ma of
current to ground and is used when the external current loop device
has no current source.
Data received from a current loop device enters Sol on pins
12 and 13 of J1 in the form of no current for a 0 and 20 ma of cur-
rent for a 1. This input is rectified by bridge rectifier D3-D6 and
applied to a light emitting diode (LED) in optical isolator U39. As
its name implies, U39 electrically isolates the current loop circuit
from the rest of the Sol. (This isolation permits a high offset
voltage on pins 12 and 13 of J1.) For a 1, the LED is energized, and
VIII-21