Omron CX-Programmer 9, Руководство по эксплуатации

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PART 2: CX-Server PLC Tools
OMRON CHAPTER 4 – PLC Setup Component
CX-Server PLC Tools_ Page 47
High Speed Counters
The CQM1H-CTB41 high-speed counter board is an Inner Board applicable to units CPU51 and CPU61. A
maximum of two boards can be mounted simultaneously in slots 1 & 2 of the PLC. The high-speed counter board
counts high-speed pulses from 50 to 500 kHz entering through ports 1 to 4. It performs tasks according to the
number of pulses counted.
When the present value of the high-speed counter matches a specified target value or lies within a specified range,
the bit pattern specified in the comparison table is stored in internal output bits and external output bits. A bit
pattern can be set for each comparison result and the external output bits can be output through an external output
terminal.
Up to four external outputs can be produced when either the target value is matched or a range comparison
condition is satisfied. The high-speed counter board does not provide high-speed counter interrupts, it simply
compares the present value to target values or comparison ranges and produces internal and external bit outputs.
CPM1/CPM1A PLCs have a high-speed counter function that can be used in incrementing mode or up/down
mode. The high-speed counter can be combined with input interrupts to perform target value control or zone
comparison control that is not affected by the PLCs cycle time. High-speed counter signals can be input to CPU
bits 00000 through 00002. In incrementing mode, input 00001 can be used as a regular input.
High Speed Counter/Synchronised Pulse Control
Select the appropriate option to determine the parameters of the high speed counter. If the option ‘Don’t use either
function’ is selected the counter is disabled and the Counter Reset and Counter Mode option are disabled.
Counter Reset
Select the counter reset mode of operation, either Z phase and software reset or Software reset only.
Counter Mode
Select the appropriate option to determine the counters mode of operation.
Device Net
I/O Link Refresh Area
Note: This tab is only available for the CPM2*-S* PLCs.
1, 2, 3… 1. Standard - Select this button to set the standard/default settings for the I/O Refresh Area.
2. Custom - Select this button to make your own settings.
3. Write: These setting are the same as Read, but without the option of selecting the 'AR'
memory area.
♦
Area - This option defaults to IR area 1, but can be set to IR area 2, DM area, LR area or HR
area.
♦
Address - This is the beginning address number.
♦
Size - The default is 0. However, if the size is 0 for Write, then the size for Read must be 1, or
vice versa. Any custom setting's maximum value is determined by what the Area and Address
values before it were set to. For example, if IR area 1 is selected, and the maximum address is
specified (in this case max = 49), then the maximum size is 1. (The size value is specified in
Words).
4. Read: These setting are the same as Write, but with the additional option of being able to
selecting the 'AR' memory area for reading.
♦
Area - This option defaults to IR area 1, but can be set to IR area 2, DM area, LR area or HR
area.
♦
Address - This is the beginning address number.
♦
Size - The default is 0. However, if the size is 0 for Write, then the size for Read must be 1, or
vice versa. Any custom setting's maximum value is determined by what the Area and Address
values before it were set to. For example, if IR area 1 is selected, and the maximum address is
specified (in this case max = 49), then the maximum size is 1. (The size value is specified in
Words).