Mini-FlexBus
Freescale Semiconductor
11-14
MCF51CN128 Reference Manual, Rev. 6
the first clock. The device tristates FB_AD[
on the second clock and continues to drive address on
FB_AD[
] throughout the bus cycle. The external device returns the read data on FB_AD[7:0].
Figure 11-10. Single Byte-Read Transfer
shows the similar configuration for a write transfer. The data is driven from the second clock
on FB_AD[7:0].
Figure 11-11. Single Byte-Write Transfer
7:0]
19:8
FB_CLK
S0
S1
S2
S3
FB_R/W
FB_ALE
DATA[7:0]
DATA[7:0]
Mux’d Bus
Non-Mux’d Bus
FB_A[19:0]
ADDR[19:0]
ADDR[19:8]
FB_D[7:0]
ADDR[7:0]
FB_AD[19:8]
FB_AD[7:0]
FB_CS
n
, FB_OE
S0
FB_CLK
S0
S1
S2
S3
FB_R/W
FB_ALE
FB_OE
DATA[7:0]
DATA[7:0]
Mux’d Bus
Non-Mux’d Bus
FB_A[19:0]
ADDR[19:8]
ADDR[19:0]
FB_D[7:0]
ADDR[7:0]
FB_AD[19:8]
FB_AD[7:0]
FB_CS
n
S0