CHAPTER 14 RESET FUNCTION
User’s Manual U16898EJ3V0UD
239
Figure 14-2. Timing of Reset by RESET Input
<1> With high-speed internal oscillation clock or external clock input
Hi-Z
RESET
Port pin
(except P130)
Port pin
(P130)
Note 2
Delay
Normal operation
in progress
CPU clock
Reset period
(oscillation stops)
Normal operation (reset processing, CPU clock)
Internal reset signal
High-speed internal oscillation clock or
external clock input
Delay
Operation stops because option
byte is referenced
Note 1
.
100 ns (TYP.)
100 ns (TYP.)
Notes 1.
The operation stop time is 277
µ
s (MIN.), 544
µ
s (TYP.), and 1.075 ms (MAX.).
2.
Set high level output using software.
Remark
When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
<2> With crystal/ceramic oscillation clock
Hi-Z
RESET
Port pin
(P130)
Note 2
Port pin
(except P130)
Delay
Normal operation
in progress
Reset period
(oscillation stops)
Oscillation stabilization
time (2
10
/f
X
to 2
17
/f
X
)
Normal operation
(reset processing, CPU clock)
Internal reset signal
Crystal/ceramic
oscillation clock
Delay
Operation stops because option
byte is referenced
Note 1
.
100 ns (TYP.)
100 ns (TYP.)
Notes 1.
The operation stop time is 276
µ
s (MIN.), 544
µ
s (TYP.), and 1.074 ms (MAX.).
2.
Set high level output using software.
Remark 1.
f
X
: System clock oscillation frequency
2.
When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.