Series 2600 System SourceMeters Reference Manual
Status Model D-13
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2600S-901-01 Rev. A / May 2006
The bits of the Status Byte Register are described as follows:
•
Bit B0, Measurement Summary Bit (MSB)
— Set summary bit indicates
that an enabled measurement event has occurred.
•
Bit B1,
System Summary Bit (SSB)
— Set summary bit indicates that an
enabled system event has occurred.
•
Bit B2, Error Available (EAV)
— Set bit indicates that an error or status
message is present in the Error Queue.
•
Bit B3, Questionable Summary Bit (QSB)
— Set summary bit indicates
that an enabled questionable event has occurred.
•
Bit B4, Message Available (MAV)
— Set bit indicates that a response
message is present in the Output Queue.
•
Bit B5, Event Summary Bit (ESB)
— Set summary bit indicates that an
enabled standard event has occurred.
•
Bit B6, Request Service (RQS)/Master Summary Status (MSS)
— Set
bit indicates that an enabled summary bit of the Status Byte Register is set.
Depending on how it is used, Bit B6 of the Status Byte Register is either the
Request for Service (RQS) bit or the Master Summary Status (MSS) bit:
• When using the GPIB serial poll sequence of the SourceMeter to obtain
the status byte (serial poll byte), B6 is the RQS bit. See “
” for details on using the serial poll sequence.
• When using the *STB? common command or
status.condition
) to read the status byte, B6 is the MSS bit.
•
Bit B7, Operation Summary (OSB)
— Set summary bit indicates that an
enabled operation event has occurred.
Service request enable register
The generation of a service request is controlled by the Service Request Enable
Register. This register is programmed by the user and is used to enable or disable
the setting of bit B6 (RQS/MSS) by the Status Summary Message bits (B0, B2,
B3, B4, B5, and B7) of the Status Byte Register. As shown in
, the
summary bits are logically ANDed (&) with the corresponding enable bits of the
Service Request Enable Register. When a set (1) summary bit is ANDed with an
enabled (1) bit of the enable register, the logic “1” output is applied to the input of
the OR gate and, therefore, sets the MSS/RQS bit in the Status Byte Register.
The individual bits of the Service Request Enable Register can be set or cleared
by using the *SRE common command or its script equivalent. To read the Service
Request Enable Register, use the *SRE? query or script equivalent. The Service
Request Enable Register clears when power is cycled or a parameter value of 0 is
sent with the *SRE command (i.e. *SRE 0). The commands to program and read
the SRQ Enable Register are listed in
.
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