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Figure 52. Diagram of the Different Phases o n the High Performance Switch
Read the section on switch logs and also the following information, which gives
some indication of how this problem has occurred.
There are multiple ports called out by switch chips in the
/var/adm/SPlogs/css/flt. This rarely happens on real faults. When the chip can
narrow down to a single port, there is usually only one port that breaks. The
exception would be when multiple ports on a chip are connected to the same
switch, which has been powered off. This indicator is particularly interesting
when you start seeing random ports being reported over time (for example, ports
0, 1, and 7 reported at one time and ports 0, 1, and 6 reported at another time).
Another strong indication of this problem is that multiple onboard switch ports
(ports 4, 5, 6 and 7) are reported. Recall that these connect to different chips on
board.
The adapters may report MSTAT=12345678 or 000000080.
A message like:
run_phase_transition: message not sent in time,
may be
generated. The next fault seen is likely to be caused by this timeout.
If there is a problem with switch faulting and there are symptoms like those
described above, then contact the local IBM Support Center and mention APARs
IX53234 and IX54543.
Additional Information
Important
This applies only to the HiPS. The new SP switch does not have a service
phase.
Chapter 4. The Switch
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