IBM RS/6000 SP, Руководство по определению проблем

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For example, Node 14 (N14) is connected to the switch board at J4 on the High
Performance Switch, but on the SP Switch it is connected at J34. Look at
Figure 45 on page 95 and compare it with Figure 41 on page 88 for the High
Performance Switch to discover how it is cabled differently.
Figure 45. The SP Switch Board
J3 to J34 Bulkhead jacks for data cables
V1 to V32 Data connectors on the switch board (silk screen)
SW0 to SW7 Logical identification of switch chips
• In output files, add 10,000 to the logical number.
•
The frame number is used to build logical number. Multiply
frame number by 10.
U1 to U8 Master switch chip silkscreen on the board
N1 to N16 Node ports (physical numbering)
E1 to E16 Switch to switch ports
4.3 Switch Topology and Clock Subsystem
The following section discusses switch topology and clock subsystem
considerations.
4.3.1 Switch Topology Files
The switch topology file is critical to the successful working of the switch. The
switch daemons (which will be discussed in some detail later) use this topology
file as the basis for creating the routing tables which get propagated to every
node on the switch network. The topology files are shipped as standard with the
POWERparallel System Support Programs software, and during the installation
Chapter 4. The Switch
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