Microprocessors
When you install an additional microprocessor, the Netfinity
5000 can operate as a symmetric multiprocessing (SMP)
server. With SMP, certain operating systems and
application programs can distribute the processing load
between microprocessors. This enhances performance for
database and point-of-sale applications, integrated
manufacturing solutions, and other applications.
Installing microprocessor upgrades:
The
server comes with an Intel Pentium II microprocessor.
This microprocessor incorporates MMX technology with
built-in ECC level two (L2) cache. For the latest
information about microprocessor upgrades available for
the server, contact your IBM reseller, IBM marketing
representative, or see http://www.ibm.com/pc/us/compat/
on the World Wide Web. If you do upgrade the
microprocessor, use the instructions that come with the
upgrade along with the instructions in “Installing or
replacing a microprocessor” on page 119.
Attention
If you install an additional microprocessor that is
different from the currently installed
microprocessor, the server operation might be
unreliable. To prevent this, use a microprocessor
with the same internal and external clock speed,
and the same cache size and voltage
requirements as those of the currently installed
microprocessor. Microprocessor internal and
external clock frequencies and cache size must
be identical.
The voltage-regulator module (VRM) for the
additional microprocessor plugs into a connector
on the system board (see “System board
connectors” on page 143 for the location of the
VRM connector). Because each microprocessor
has specific power and voltage requirements, be
sure to use the VRM that comes with the
microprocessor.
Note: The voltage regulator function for the
microprocessor that is shipped with the
server is built into the system board.
If you select a setting for the frequency switch
that is greater than the actual frequency of the
microprocessor, you might damage the
microprocessor. The frequency switch settings
are shown in Table 5 on page 123.
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