3-34
B90 Low Impedance Bus Differential System
GE Multilin
3.3 DIRECT INPUT/OUTPUT COMMUNICATIONS
3 HARDWARE
3
To recover the Rx clock from the data-stream, an integrated DPLL (digital phase lock loop) circuit is utilized. The DPLL is
driven by an internal clock, which is 16-times over-sampled, and uses this clock along with the data-stream to generate a
data clock that can be used as the SCC (serial communication controller) receive clock.
3.3.6 RS422 AND FIBER INTERFACE
The following figure shows the combined RS422 plus fiberoptic interface configuration at 64K baud. The 7L, 7M, 7N, 7P,
and 74 modules are used in two-terminal with a redundant channel or three-terminal configurations where channel 1 is
employed via the RS422 interface (possibly with a multiplexer) and channel 2 via direct fiber.
AWG 20-24 twisted shielded pair is recommended for external RS422 connections and ground the shield only at one end.
For the direct fiber channel, address power budget issues properly.
When using a LASER Interface, attenuators can be necessary to ensure that you do not exceed
maximum optical input power to the receiver.
Figure 3–39: RS422 AND FIBER INTERFACE CONNECTION
Connections shown above are for multiplexers configured as DCE (data communications equipment) units.
3.3.7 G.703 AND FIBER INTERFACE
The figure below shows the combined G.703 plus fiberoptic interface configuration at 64 kbps. The 7E, 7F, 7G, 7Q, and 75
modules are used in configurations where channel 1 is employed via the G.703 interface (possibly with a multiplexer) and
channel 2 via direct fiber. AWG 24 twisted shielded pair is recommended for external G.703 connections connecting the
shield to pin 1a at one end only. For the direct fiber channel, address power budget issues properly. See previous sections
for additional details on the G.703 and fiber interfaces.
When using a laser Interface, attenuators can be necessary to ensure that you do not exceed the
maximum optical input power to the receiver.
Figure 3–40: G.703 AND FIBER INTERFACE CONNECTION
Содержание B90 UR Series
Страница 28: ...1 20 B90 Low Impedance Bus Differential System GE Multilin 1 5 USING THE RELAY 1 GETTING STARTED 1 ...
Страница 114: ...4 28 B90 Low Impedance Bus Differential System GE Multilin 4 3 FACEPLATE INTERFACE 4 HUMAN INTERFACES 4 ...
Страница 272: ...6 14 B90 Low Impedance Bus Differential System GE Multilin 6 5 PRODUCT INFORMATION 6 ACTUAL VALUES 6 ...
Страница 316: ...A 4 B90 Low Impedance Bus Differential System GE Multilin A 1 PARAMETER LISTS APPENDIX A A ...
Страница 406: ...B 90 B90 Low Impedance Bus Differential System GE Multilin B 4 MEMORY MAPPING APPENDIX B B ...
Страница 436: ...C 30 B90 Low Impedance Bus Differential System GE Multilin C 7 LOGICAL NODES APPENDIX C C ...
Страница 446: ...D 10 B90 Low Impedance Bus Differential System GE Multilin D 1 IEC 60870 5 104 APPENDIX D D ...