GE B90 UR Series, Инструкция по эксплуатации

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GE Multilin B90 Low Impedance Bus Differential System 5-105
5 SETTINGS 5.5 GROUPED ELEMENTS
5
DIRECT INPUT 8 DEVICE
: "3" (message received from IED 3)
DIRECT INPUT 8 BIT NUMBER
: "14" (this is BKRSUPV 3 HISET OP for Phase C)
DIRECT INPUT 9 DEVICE
: "3" (message received from IED 3)
DIRECT INPUT 9 BIT NUMBER
: "15" (this is BKRSUPV 3 LOSET OP for Phase C)
The received flags are now to be configured for in the Breaker Failure 3 logic as follows:
BF 3 AMP SUPV OP A
:
"Direct Input 1 On"
BF 3 AMP HISET OP A
:
"Direct Input 2 On"
BF 3 AMP LOSET OP A
:
"Direct Input 3 On"
BF 3 AMP SUPV OP B
: "Direct Input 4 On"
BF 3 AMP HISET OP B
: "Direct Input 5 On"
BF 3 AMP LOSET OP B
: "Direct Input 6 On"
BF 3 AMP SUPV OP C
:
"Direct Input 7 On"
BF 3 AMP HISET OP C
:
"Direct Input 8 On"
BF 3 AMP LOSET OP C
:
"Direct Input 9 On"
The B90 current supervision elements reset in less than 0.7 of a power cycle up to the multiple of pickup of 100 (threshold
set at 0.01 of the actual fault current) as shown below.
Figure 5–47: BREAKER FAILURE OVERCURRENT SUPERVISION RESET TIME
As the overcurrent supervising flags must be sent via Direct I/Os to the B90 IEDs that perform the BF functionality, an extra
delay is introduced. Consequently, the following is recommended for coordinating the BF time:
(EQ 5.3)
where: 0.7 of a power cycle = the reset of the BF overcurrent elements
Direct I/O bridge count = the number of "bridges" between the source and destination of the Direct I/O messages
(Direct I/O delay)
For example, in the four-IED application example shown earlier, IED 2 is two "bridges" away from IED 4; therefore, the Total
BF Reset Time is 0.7 + 2 x 0.2 = 1.1 of a power system cycle.
(EQ 5.4)
Note that a message delivery time of 0.2 of a cycle per "bridge" applies when the
DIRECT I/O DATA RATE
is set to 128 kbps.
The relay uses sophisticated algorithms to speed up the reset time of the breaker failure overcurrent supervision.
Caution must be paid when testing the B90 for BF reset times. In particular, the current must be interrupted in a way
resembling the actual breaker operation (zero-crossing).
836769A4.CDR
0
0.2
0.4
0.6
0.8
0 20 40 60 80 100 120 140
Average
Maximum
Margin
Mul WL ple of pickup
fault current
threshold setting
Br
eaker
failur
e
reset
time
(cycles)
Total BF Reset Time 0.7 of a power cycle 0.2 of a power cycle Direct I/O bridge count

+ =
Total BF Reset Time 0.7 of a power cycle 0.2 of a power cycle Direct I/O bridge count

+ =
0.7 2 0.2

+ =
1.1 of a power cycle
=
NOTE