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GR716-DS-UM, May 2019, Version 1.29
251
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GR716
d1
) if the conditional termination condition of Table 277 is
false
then the core will go back to step
a,
if the conditional termination condition of Table 277 is
true
, the core will fetch a portion of the
data from the data descriptor which is COND_SIZE bytes, then go back to step
a
.
c2
) the core will monitor line IRQN of the IRQ_TRIG input signal.
d2
) when the monitored line has a value of ‘1’, the core will fetch a portion of the data from the data
descriptor which is COND_SIZE bytes, then go back to step
a
.
The total SIZE of the bond data descriptor will be decremented by COND_SIZE bytes every time the
bond data descriptor is executed, and the ADDRESS will be incremented by the same amount (unless
the FA flag is set).
The FA (Fixed Address) bit field in the data descriptor control field is useful when accessing data to/
from a peripheral data register, i.e. UART data register, when you need to read/write always from/to
the same address.
The execution of the descriptor pair (conditional and bond data descriptors) ends when the SIZE field
of the data descriptor reaches 0. In other words, the execution ends when SIZE bytes have been
fetched in total from the data descriptor, by fetching COND_SIZE byte amounts every time the condi-
tional condition (polling or triggering) is true.
28.3.3 Operation with conditional descriptors type 1
Conditional descriptors version 1 only associates with 1 pair of data descriptors which will be exe-
cuted COND_CNT number of times.
Conditional descriptor and data descriptor will only be fetched once and kept in memory until com-
pletion or an error occur. Note that the conditional descriptor can be programed to loop in infinity and
will only end at an error or when manually disabled by user or software.
After the descriptors’ pair has been fetched, the conditional execution will follow these steps:
a
) the core will execute the conditional counter, down counting for COUNTER_RST clock cycles
b
) the core will monitor line COND_IRQN of the IRQ_TRIG input signal.
c
)
if trigger is detected read data at address COND_ADDR.
d
) Match read data bits specified in bit fields COND_DATA and COND_MASK according to table
false
then the core will go back to step
b
.
The total SIZE of the bond data descriptor will be decremented by COND_SIZE bytes every time the
bond data descriptor is executed, and the ADDRESS will be incremented by the same amount (unless
the FA flag is set).
The FA (Fixed Address) bit field in the data descriptor control field is useful when accessing data to/
from a peripheral data register, i.e. UART data register, when read/write always is executed from/to
the same address.
The FS (Fixed Start address) bit field in the data descriptor control field is useful when accessing data
to/from a peripheral with multiple data registers, i.e. multiple samples from the internal ADC inter-
face, when read/write always is executed from/to the same addresses.
The conditional descriptor will considered to be complete when the data descriptors has been exe-
cuted the number of times specified in the conditional loop counter field, COND_CNT. When the
conditional descriptor is complete the status bit Conditional type 1 counter End (TE) in the error reg-
ister will be set and an interrupt is issued if the interrupt enable bit is set in the control register.
28.3.4 Simplified mode of operation
In Simplified Mode of Operation, the GRDMAC core configuration resides entirely in its configura-
tion registers and the Channel Vector structure is not used. The core will not perform any memory
access to fetch configuration data. This mode of operation makes use of only two data descriptors,