UG-549
ADuCM310 Hardware Reference Manual
Rev. C | Page 82 of 192
Signature
The signature checks the integrity of the flash device. The signature is calculated from the lowest 32-bit word to the second highest 32-bit
word in the selected block. The signature is a 24-bit CRC with an initial value of 0xFFFFFF and the following polynomial:
x
24
+
x
23
+
x
6
+
x
5
+
x
+ 1
The data is pushed into the CRC polynomial until the specified end address is reached. A block can be a single page or multiple pages.
The hardware assumes that the signature for a block is stored in the upper four bytes of the most significant page of a block; therefore,
these 32 bits are not included when generating the signature. While the signature is being computed for a particular flash, all other
accesses to the same flash are stalled.
Note that FEEADR0/FEEADR1 addresses are byte addresses, but only pages must be identified because the lower 11 bits are ignored by
the hardware. Also ensure that the addresses written to FEEADR0/FEEADR1 are both either in Flash 0 or Flash 1.
The following code illustrates how the CRC is calculated and how to compare it to the result of the sign command.
int FeeCrc(int iLen,int *aiData)
{
int i1,i2,iCrc;
iCrc = 0xffffffff; //Seed value.
for(i1=0; i1<iLen; i1++) //Starting at lowest address.
{
for(i2=31; i2>=0; i2--) //MSB first.
{
iCrc <<= 1; //Left shift.
if((*(i1))&(1<<i2)) iCrc ^= 0x00800063; //^= Polynomial.
if(iCrc&(1<<24)) iCrc ^= 0x00800063;
}
}
return(iCrc&0x00ffffff); //Return 24 bits.
}
int FeeSign(unsigned long ulStartAddr, unsigned long ulEndAddr)
{
if((pADI_FEE->FEESTA&1)!=0) return 0;
pADI_FEE->FEEADR0 = ulStartAddr;
pADI_FEE->FEEADR1 = ulEndAddr;
pADI_FEE->FEEKEY = 0xF123F456;
pADI_FEE->FEECMD = 0x2;
return 1;
}
FeeSign(0x00800,0x00900); //SIGN for page1.
if(FeeCrc(511,(int *)0x00800) != pADI_FEE->FEESIG)
FlagError();
Else FlagSuccess();
ECC Error Handling
During the signature check, the Error Checking and Correcting (ECC) is checked on each 72-bit flash read (64-bit flash read and 8-bit
ECC). If errors are corrected by the ECC, the ERRDETECTED flag in the status register, FEESTA, is set after the signature check is completed. If
errors are detected and cannot be corrected by ECC, the ERRDETECTED flag in FEESTA is set. A signature check is treated as a failure
when the computed signature is not equal to the stored signature.
During a read of the flash, if there is a 1-bit error, the error is corrected by default but neither ECC interrupts nor system exceptions are enabled.
If interrupts or system exceptions are not enabled by the user, the appropriate flags in FEESTA are not set in the event of an ECC error.
