Abov MC96FR364B, Руководство пользователя

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MC96FR364B
November, 2018 Rev.1.4 7
Figure 11-10 Timer 0,1 Operation in 8-bit Input Capture Mode .......................................................... 79
Figure 11-11 Example of Capture Interval Calculation in 8-bit Input Capture Mode .......................... 79
Figure 11-12 Block Diagram of Timer 0, 1 in 16-bit Capture Mode .................................................... 80
Figure 11-13 Block Diagram of Timer 1 in PWM mode ...................................................................... 81
Figure 11-14 Example of PWM Waveform (In case frequency of SCLK(=f
SCLK
) is 4MHz
)
............... 82
Figure 11-15 Behaviour of waveform when changing period (In case f
SCLK
is 4MHz) ........................ 82
Figure 11-16 Block Diagram of 16-bit Timer 2 in Output Compare or Event Counter Mode ............. 87
Figure 11-17 Block Diagram of Timer 2 in Capture Mode .................................................................. 87
Figure 11-18 Block Diagram of Timer 2 in Carrier Counting Mode .................................................... 88
Figure 11-19 Block Diagram of Timer 3 in Output Compare or Event Counter Mode ........................ 92
Figure 11-20 Block Diagram of Timer 3 in Capture Mode .................................................................. 93
Figure 11-21 Block Diagram of Timer 3 in Carrier Counting Mode .................................................... 94
Figure 11-22 Block Diagram of Timer 3 in PWM Mode ..................................................................... 95
Figure 11-23 Example of PWM waveform (In case of f
SCLK
=4MHz) .................................................. 96
Figure 11-24 Block Diagram of Watch Timer in Normal mode ......................................................... 101
Figure 11-25 Block Diagram of Watch Timer in IR capture mode .................................................... 102
Figure 11-26 Timing Diagram of Watch Timer in IR capture mode .................................................. 102
Figure 11-27 Block Diagram of IR Capture function ......................................................................... 107
Figure 11-28 Block Diagram of IR AMP ........................................................................................... 107
Figure 11-29 Block Diagram of Carrier Generator ............................................................................. 111
Figure 11-30 Period of Carrier signal and Remote data pulse ............................................................ 115
Figure 11-31 REMOUT by CRF & ROB (In case of CEN=1, RDPE=1) .......................................... 116
Figure 11-32 REMOUT by ROB only (In case of CEN=0, RDPE=1) ............................................... 116
Figure 11-33 REMOUT by RODR ..................................................................................................... 117
Figure 11-34 Block Diagram of KEYSCAN module ......................................................................... 119
Figure 11-35 The Block Diagram of USART ..................................................................................... 123
Figure 11-36 The Block Diagram of Clock Generation ...................................................................... 124
Figure 11-37 Synchronous Mode XCKn Timing. .............................................................................. 125
Figure 11-38 frame format .................................................................................................................. 126
Figure 11-39 Start Bit Sampling ......................................................................................................... 129
Figure 11-40 The Sampling of Data and Parity Bit ............................................................................ 130
Figure 11-41 Stop Bit Sampling and Next Start Bit Sampling ........................................................... 130
Figure 11-42 SPI Clock Formats when UCPHA=0 ............................................................................ 132
Figure 11-43 SPI Clock Formats when UCPHA=1 ............................................................................ 133
Figure 11-44 I
2
C Block Diagram ........................................................................................................ 140
Figure 11-45 Bit Transfer on the I
2
C-Bus ........................................................................................... 141
Figure 11-46 START and STOP Condition ........................................................................................ 141
Figure 11-47 STOP or Repeated START Condition .......................................................................... 142
Figure 11-48 Acknowledge on the I
2
C-Bus ........................................................................................ 142
Figure 11-49 Clock Synchronization during Arbitration Procedure ................................................... 143
Figure 11-50 Arbitration Procedure of Two Masters .......................................................................... 143
Figure 11-51 Formats and States in the Master Transmitter Mode ..................................................... 146
Figure 11-52 Formats and States in the Master Receiver Mode ......................................................... 148
Figure 11-53 Formats and States in the Slave Transmitter Mode ....................................................... 150