60
November, 2018 Rev.1.4
10.12.5 External Interrupt Edge Register (EIEDGE)
External Interrupt Edge Register decides the trigger mode of external interrupt, edge or level mode.
To make a external interrupt triggered by a falling or rising edge, write ‘00
B
’ to the corresponding bit
position. And to make a external interrupt triggered by a low or high level, write ‘01
B
’, ‘10
B
’ or ‘11
B
’ to
the corresponding bit position. Initially, all external interrupts are triggered by high level. Note there
are 2 bits for each external interrupt pin.
10.12.6 External Interrupt Polarity Register (EIPOLA)
This register has different meaning according to the value set in EIEDGE register. When a external
interrupt is configured to be triggered by a level, the high or low trigger level is selected through this
register. When a external interrupt is configured to be triggered by a edge, the value in this register
has nothing to do with the triggering edge.
10.12.7 External Interrupt Enable Register (EIENAB)
External Interrupt Enable Register selects each port pin, which has sub function for external interrupt,
whether to use as external interrupt pin or normal port pin. When a bit in this register is written ‘0’, the
corresponding pin is used as general purpose I/O pin.
Содержание MC96FR364B
Страница 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Страница 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Страница 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Страница 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
