10. Parallel I/O
ÛZIATECH
64
Bank Address Register
This register controls the polarity of the Sense Event for I/O ports 4 and 5. A 0 senses
negative events, while a 1 senses positive events. Bits 6 and 7 select an individual
bank. A read from this register returns only the bank status information.
Parallel Port Bank Address Register
0
1
2
3
4
5
6
7
Register: Bank Address/
Event Sense Manage
Mode: Enhanced (Bank 1)
Address: E7h
Access: Read
Bank Address
00 Bank 0
01 Bank 1
10 Bank 2
11 Undefined
Bank
1
Bank
0
0
1
2
3
4
5
6
7
Register: Bank Address/
Event Sense Manage
Mode: Enhanced (Bank 1)
Address: E7h
Access: Write
Event Polarity
0 Negative
1 Positive
Bank Address
00 Bank 0
01 Bank 1
10 Bank 2
11 Undefined
Bits 7-4 Bits 0-3
Bits 7-4 Bits 0-3
Port 5
Port 4
Bank
1
Bank
0
ZT 8907
