3. STD Bus Interface
ÛZIATECH
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Intelligent I/O Architecture
ZT8907
Multiple Master Vs. Intelligent I/O
Both multiple master and intelligent I/O architectures are excellent methods of
increasing system performance. The application designer has the freedom to select
either architecture or combine both to meet the needs of the specific application. The
following is a brief comparison of the multiple master and intelligent I/O architectures.
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An advantage of the multiple master system is that each ZT 8907 has complete
access to all STD bus memory and I/O resources. In an intelligent I/O system, only
one ZT 8907 has access to STD bus memory and I/O, including the dual-port RAM
interface to each intelligent I/O board.
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An advantage of the intelligent I/O system is lower system cost. The intelligent I/O
architecture operates in both STD-80 and STD 32 bus structures. Dual port RAM
arbitration is local to each intelligent I/O board, eliminating the need for a system
arbiter. Also, most multiple master implementations require an STD bus memory
slave for communications between the masters. With an intelligent I/O architecture,
all communications between the single master and the intelligent I/O boards are
through the dual-port RAM local to each intelligent I/O board.
Multiple Master System Requirements
The following is a list of considerations for the ZT 8907 operating in a multiple master
architecture.
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One ZT 8907 must be configured as a permanent master, or there must be another
permanent master in the system. The permanent master is responsible for managing
the STD bus clock, CLOCK* (P49), and the system reset, SYSRESET* (P47). The
remaining ZT 8907 boards must be configured for temporary master operation.
