ÛZIATECH
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3. STD BUS INTERFACE
The ZT 8907 includes several I/O devices common to industrial control applications.
The ZT 8907 also operates with the STD 32 bus architecture to support additional I/O
and memory mapped devices as required by the application. This chapter discusses the
STD 32 architecture and its effect on the operation of the ZT 8907.
STD-80 AND STD 32 OPERATION
The
STD-80 Series Bus Specification
, developed in the early 1980s by Ziatech
Corporation, defines the electrical, mechanical, and functional characteristics of an
STD bus system based on the 8088 series of microprocessors. Features of an STD-80
system include an 8-bit data bus, 24-bit address bus, and single bus master operation.
In the late 1980s, Ziatech developed the
STD 32 Bus Specification
as an extension to
the
STD-80 Bus Specification
. Features of an STD 32 system include compatibility with
STD-80 memory and I/O boards, expansion capabilities of up to a 32-bit data bus and a
32-bit address bus, and support for multiple bus master operation.
The following topic discusses STD 32 operation in greater detail.
STD 32 Operation
Data transfers between the ZT 8907 and any STD bus memory or I/O board occur eight
bits at a time for boards supporting an 8-bit data bus and 16 bits at a time for boards
supporting a 16-bit data bus in an STD 32 system. The ZT 8907 automatically
determines the type of transfer at the start of each STD bus operation.
If the application software includes a 16-bit operation with an 8-bit STD bus board, the
ZT 8907 automatically reduces the transfer into two STD bus cycles. If the application
software includes a 16-bit operation with a 16-bit STD bus board, the ZT 8907 performs
the transfer in a single STD bus cycle.
In addition to 16-bit data transfer support, the STD 32 system has another advantage: it
supports up to seven ZT 8907 boards in a single system. With the addition of an
STD bus arbiter, such as the ZT 89CT39, multiple ZT 8907 boards have fixed or rotating
priority access to STD bus memory and I/O resources. This architecture is useful for
applications that can be divided into modular control blocks, with each module running
on a unique ZT 8907. The ZT 89CT39, if used, must be Revision D or higher.
