11. System Registers
ÛZIATECH
70
System Register 3
Digital I/O ASIC System Register 3
7
6
5
4
3
2
1
0
LED RSV OWN MMI MMS FWP P/T WDE
Register:
Address:
Access:
System Register 3
E5h
Read and Write
Watchdog (Output)
0 Disarm
1 Arm
Permanent/Temporary (Input)
0 Temporary
1 Permanent
Flash Write Protect (Output)
0 Flash read-only
1 Flash read/write
Multiple Master State (Output)
0 Zero
1 One
ZT8907
0-1 Strobe
Multiple Master Interrupt (Input/Output)
0 Inactive
1 Active
Bus Own (Output)
0 Other CPU owns floppy DMA
1 This CPU owns floppy DMA
Reserved for Ziatech
Light Emitting Diode (LED)
0 Off
1 On
†
†
†
†
†
Always write this bit to the same value as Read. DO NOT change the state of this bit
†
†
†
†
†
††
Register bits managed by Ziatech operating system software.
Note:
Be sure to use the code fragments listed in Chapter 12 "Watchdog Timer" and
Chapter 14 "Programmable LED" before writing to this register. It is critical for STAR
SYSTEM operation that the state of bits 1, 3, 4, 5, and 6 be maintained as the code
fragments indicate.
ADDITIONAL INFORMATION
The ZT 8907 includes several other system registers that are exclusively managed by
Ziatech operating system software. These registers are located in the ALi chipset. Refer
to the Acer Labs
FINALI-486 M1487/M1489 486 PCI Chip Set Preliminary Data Sheet
for more information on these registers.
