ÛZIATECH
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6. DMA CONTROLLER
The ZT 8907 includes two cascaded, Intel 8237-compatible Direct Memory Access
controllers that provide a programmable interface for direct transfers between
peripherals and main memory. Seven channels of DMA are available from the two
cascaded 8237 DMA controllers. Up to four STD bus DMA slaves and up to two
onboard (local) DMA slaves are supported, depending on configuration. DMA slaves are
I/O devices that use a ZT 8907 DMA channel to transfer data to or from ZT 8907
memory. The major features of the DMA architecture are listed below.
•
Independent auto-initialization
•
Address increment and decrement
•
Single, block, and demand transfers
•
One STD bus backplane DMA channel
•
Three STD bus frontplane DMA channels
•
DMA transfers over the 0-16 Mbyte memory address range
•
Block DMA transfer rates of greater than 2 Mbytes/sec
•
One DMA channel for ECP (parallel printer) support
•
One DMA channel for (optional) local floppy drive
The DMA architecture is illustrated in the "
" figure. The architecture
includes a slave DMA controller and a master DMA controller. The slave DMA controller
includes DMA channels 0 through 3. These channels are dedicated to 8-bit DMA
transfers. The master DMA controller includes DMA channels 4 through 7. These
channels are dedicated to 16-bit DMA transfers.
A maximum of five DMA devices may be connected to the ZT 8907 simultaneously: one
DMA channel for floppy drive (either backplane or onboard), one DMA channel for
onboard ECP support, and three DMA channels available through frontplane
connector J6.
