VIMS Registers
7.8.1.38 FPAC2 Register (Offset = 204Ch) [reset = 0h]
FPAC2 is shown in
and described in
Internal. Only to be used through TI provided API.
Figure 7-47. FPAC2 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
PAGP
R-0h
R/W-0h
Table 7-41. FPAC2 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-16
RESERVED
R
0h
Internal. Only to be used through TI provided API.
15-0
PAGP
R/W
0h
Internal. Only to be used through TI provided API.
584
Versatile Instruction Memory System (VIMS)
SWCU117C – February 2015 – Revised September 2015
Copyright © 2015, Texas Instruments Incorporated