Interrupts and Events Registers
4.7.2.58 UDMACH4BSEL Register (Offset = 524h) [reset = 2Ah]
UDMACH4BSEL is shown in
and described in
.
Output Selection for DMA Channel 4 REQ
Figure 4-67. UDMACH4BSEL Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EV
R-0h
R-2Ah
Table 4-72. UDMACH4BSEL Register Field Descriptions
Bit
Field
Type
Reset
Description
31-7
RESERVED
R
0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
6-0
EV
R
2Ah
Read only selection value
2Ah = SSI0 TX DMA burst request , controlled by
SSI0:DMACR.TXDMAE
343
SWCU117C – February 2015 – Revised September 2015
Interrupts and Events
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