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Figure 6-1 Block diagram of the SRAM Basic Demonstration
The system flow is controlled by a Nios II program. First, the Nios II program writes test patterns
into the whole 512KB of SRAM. Then, it calls Nios II system function, alt_dache_flush_all, to
make sure all data has been written to SRAM. Finally, it reads data from SRAM for data
verification. The program will show progress in JTAG-Terminal when writing/reading data to/from
the SRAM. When verification process is completed, the result is displayed in the JTAG-Terminal.
Design Tools
•
Quartus II 13.0
•
Nios II Eclipse 13.0
Demonstration Source Code
•
Quartus Project directory: C5G_SRAM
•
Nios II Eclipse:
C5G_SRAM\Software
Nios II Project Compilation
Before you attempt to compile the reference design under Nios II Eclipse, make sure the project is
cleaned first by clicking ‘Clean’ from the ‘Project’ menu of Nios II Eclipse.
