Terasic Altera Cyclone V GX Starter Kit, User Manual

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Configuring the FPGA in JTAG Mode
Figure 3-3 illustrates the JTAG configuration setup. To download a configuration bit stream into
the Cyclone V GX FPGA, you need to perform the following steps:
•
Ensure that power is applied to the Cyclone V GX Starter Kit board
•
Configure the JTAG programming circuit by setting the RUN/PROG slide switch (SW11) to the
RUN position (See
Figure 3-4 )
•
Connect the supplied USB cable to the USB Blaster port on the Cyclone V GX Starter Kit board
(See
Figure 1-2 )
•
The FPGA can now be programmed by using the Quartus II Programmer to select a
configuration bit stream file with the .sof filename extension
Figure 3-3 The JTAG configuration scheme
Figure 3-4 The RUN/PROG switch (SW11) is set in JTAG mode