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Chapter 5
RTL Based Example Codes
This chapter provides a number of RTL based example codes designed for the starter board. All of
the associated files can be found in the
Demonstrations
folder on the System CD.
5
5
.
.
1
1
F
F
a
a
c
c
t
t
o
o
r
r
y
y
C
C
o
o
n
n
f
f
i
i
g
g
u
u
r
r
a
a
t
t
i
i
o
o
n
n
The C5G board is shipped from the factory with a default configuration bit-stream that
demonstrates some of the basic features of the board. The setup required for this demonstration, and
the locations of its files are shown below.
Demonstration File Locations
•
Project directory: C5G_Default
•
Bit stream used: C5G_Default.sof
Demonstration Setup and Instructions
•
Power on the C5G board.
•
You should now be able to observe that LEDs and 7 SEGs are flashing.
•
Press CPU_RESET_n to make LEDs and 7 SEGs all light on.
•
Optionally connect a HDMI display to the HDMI connector. When connected, the HDMI
display should show a color picture
•
Optionally connect a powered speaker to the stereo audio-out jack and press KEY1 to hear a 1
kHz humming sound from the audio-out port.
•
The Verilog HDL source code for this demonstration is provided in the
C5G_Default folder
,
which also includes the necessary files for the corresponding Quartus II project. The top-level
Verilog HDL file, called C5G_Default.v, can be used as a template for other projects, because it
defines ports that correspond to all of the user-accessible pins on the Cyclone V FPGA.
