TCC720
GSIO
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
10 - 4
FP
[12]
Frame pulse polarity
0
FRM has low active pulse
1
FRM has high active pulse
FRM1
[11:6]
Frame pulse start position
n
Frame pulse starts after n base clock has generated
FRM2
[5:0]
Frame pulse end position
n
Frame pulse ends after n base clock has generated
GSIO Global Control Register (GSGCR) 0x8000070C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
G3 G2 G1 G0 IEN3 IEN2 IEN1
IEN0
FLG3 FLG2 FLG1 FLG0
Busy3 Busy2 Busy1 Busy0
G[3:0]
[15:12]
GPIO_B[23:21] Other Function Signal Select
if bit n is 1
FRM, SCK, SDO output of GSIOn is come out from GPIO_B[23:21]
*) If multiple bit of G[3:0] is set to 1, the output of each GSIO is orred and come out from GPIO_B[23:21]
IEN[3:0]
[11:8]
GSIO Interrupt Enable
if bit n is 1
GSIOn Interrupt is enabled
0
GSIOn Interrupt is disabled
FLG[3:0]
[7:4]
R/W
GSIO Interrupt Flag
if bit n is 1
R
GSIOn operation (read/write) has been completed.
if bit n is 1
W
Clear FLG[n] field
*) If an interrupt of a GSIO is enabled, GSIO interrupt is generated when the GSIO operation is completed.
These FLGn can be used to distinguish which GSIO has generated the interrupt. These flags are cleared
by writing “1” at the corresponding flag.
Busy[3:0]
[3:0]
GSIO Cycle Busy Flag
if bit n is 0
GSIOn transmission has finished, and can transmit another serial data.
if bit n is 1
GSIOn transmission is in operation, so it cannot accept another serial data.
Summary of Contents for TCC720
Page 1: ...USER S MANUAL TCC720 32 bit RISC Microprocessor For Digital Media Player Preliminary Rev 0 51...
Page 3: ...CHAPTER 1 INTRODUCTION...
Page 12: ...CHAPTER 2 ADDRESS REGISTER MAP...
Page 22: ...CHAPTER 3 DAI CDIF...
Page 33: ...CHAPTER 4 INTERRUPT CONTROLLER...
Page 38: ...CHAPTER 5 TIMER COUNTER...
Page 45: ...CHAPTER 6 GPIO PORT...
Page 53: ...CHAPTER 7 CLOCK GENERATOR...
Page 68: ...CHAPTER 8 USB CONTROLLER...
Page 82: ...CHAPTER 9 UART IrDA CONTROLLER...
Page 93: ...CHAPTER 10 GSIO PORT...
Page 99: ...CHAPTER 11 MISCELLANEOUS PERIPHERALS...
Page 106: ...CHAPTER 12 DMA CONTROLLER...
Page 115: ...CHAPTER 13 MEMORY CONTROLLER...
Page 130: ...CHAPTER 14 BOOTING PROCEDURE...
Page 140: ...CHAPTER 15 JTAG DEBUG INTERFACE...
Page 142: ...CHAPTER 16 PACKAGE DEMENSION...