TeleChips TCC720, User Manual

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TCC720
GSIO
32-bit RISC Microprocessor for Digital Media Player
Dec. 16. 2002
Preliminary Spec 0.51
10 - 1
10 GSIO (General Purpose Serial Input/Output) PORT
The TCC720 has three GSIOs for communication between the TCC720 and other devices that
have serial interface. All the pins in the GSIOs are multiplexed with GPIOs. User can
program what these multiplexed pins are used for. The GSIO block has 4 pins; SDI, SDO,
SCK, FRM. The SDO is the serial data output pin, the SDI is the serial data input pin, the SCK
is the serial clock pin and the FRM is frame pin. The base clock is generated by dividing the
PCLK programming the GSIO control register GSCR. The SCK is generated from the basic
clock in every data transfers. Various types of serial interface can be programmed using GSIO
control field in the GSCR. There are 5 control registers for GSIOs; GSCR0, GSCR1, GSCR2,
GSCR3, and GSICR. The start time of transfer can be controlled with programming the delay
counter field in the GSCRn. The base counter increments at every base clock right after
writing the data into the GSDRn. The serial data starts to come out when delay counter value
are same to base counter value. The word size of transfer can be programmed from 1 bit to 16
bits. The frame1 and the frame2 fields specify the start and end point of transition based on
base counter. The frame polarity defines whether the frame signal is low active or high active
signal. The Last Clock mask filed is for special serial interface, which makes the last clock
pulse masked.
/2 n Divider
Counter
Frame
Coparator
Serial CLK
Generator
GSFC
GSDO
GSCR
base_clk
frame1, frame2
PCLK
SDO
SCK
FRM
divider factor n
word_size
SDI
GSDI
Figure 10.1 GSIO Block Diagram