RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide
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The reception of data immediately following the abort/idle sequence is treated as invalid and is not presented to the user.
Therefore, to re-establish transmitter and receiver synchronization, the receiver must see at least one flag. At least one flag
and three bytes of data must be received following the abort sequence before any data is given to the host.
5.2.7 Underrun and Overrun Conditions
A bit in the interface memory OVRUN (09:7) is used to indicate to the host processor that a transmit underrun condition has
occurred. If the host does not load in a new byte of data within eight bit times, OVRUN and ABIDL will be set by the modem
and the modem will automatically send a minimum of eight continuous ones. This abort sequence will continue until the host
resets ABIDL. After the host resets ABIDL, the modem will finish sending the current byte of ones and will then send a flag.
At the end of sending a flag, if B2A is reset, the modem will interpret the data in DBUFF as being the first byte of the next
frame. After uploading this data for the first byte of the frame, the modem will reset OVRUN. The modem will always reset
OVRUN every time it sets B2A, except upon transmitter HDLC initialization. (The underrun condition is not applicable when
AEOF = 1.)
In the receiver, the OVRUN bit will inform the host that an overrun condition occurred. The overrun condition takes place
when the receiver fails to take the byte of data in DBUFF within eight bit times. The modem will thus overwrite the data in
DBUFF and, if the host has not taken the data (B2A is not reset), the modem will set OVRUN. To detect further overrun
occurrences, the host must reset this bit.
5.2.8 Transmit Mode Control
After power-up, reconfiguration, or turning ~RTS input or RTSP bit on, the host must wait for ~CTS output or CTSP bit to
turn on before starting frame transmission.
There are two ways in which the user can signal the modem to exit current HDLC execution. The first way is by setting the
SETUP bit which tells the modem that a new configuration is desired. The second way is by turning off ~RTS input or by
resetting the RTSP bit in the interface memory. In both cases, the following events will occur:
1. When AEOF is set to a 0 and if exiting after making sure the modem took the data in DBUFF, setting EOF to a 1, and
then waiting for EOF to be set to a 0 by the mode, the modem sends the last byte of data followed by the 16-bit FCS
sequence and a closing flag. The modem then either goes through the turn-off sequence (if RTS output or RTSP bit is
turned off), or sets up the new configuration (if SETUP is set to a 1).
2. When AEOF is a set to a 1 and if exiting after making sure the modem sets EOF to a 1, the modem sends the last byte
of data followed by the 16-bit FCS sequence and a closing flag. The modem then either goes through the turn-off
sequence (if RTS output or RTSP bit is turned off),
or sets up the new configuration (if SETUP is set to a 1).
3. exiting during the transmission of an abort sequence, the modem finishes sending the last byte of the abort sequence,
then either goes through the turn-off routine or sets up to a new configuration.
5.3 EXAMPLE APPLICATION
Refer to Section 3 for a description of the bits associated with the HDLC and programmable interrupt functions.
Transmitter Example
1. the modem configuration to the desired speed for transmitting, enable HDLC, parallel data mode, and RTSP. (AEOF
defaulted to 0).
2. Wait until CTSP goes low and returns to a high level.
3. Place the first byte of data into DBUFF. The modem transmits a flag followed by this byte of data.
4. As soon as B2A is set, load in the next byte of data. This must occur within eight bit times of B2A being set.
5. After all information but the last byte is given to the modem, load in the last byte of data in the frame as in step 4.
6. To end the frame, the host must load in the last byte of data into DBUFF, wait for B2A to be set, and then set EOF.
7. Repeat steps 3 through 6 for all frames to be transmitted.
8. When the last byte of the final frame is loaded into register DBUFF, wait for B2A to return high. Then set EOF and wait
for EOF to return low before resetting RTSP. The modem transmits the last byte followed by the 16-bit FCS and at least
one closing flag, depending upon if diagnostics was used to write into the flag counter RAM location as mentioned
previously. The modem then goes through its normal turn-off routine.
Summary of Contents for RFX144V24-S23
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